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RESISTANCE PATTERNS FOR AN ON-DIE EPM

2022
Online Patent

Titel:
RESISTANCE PATTERNS FOR AN ON-DIE EPM
Link:
Veröffentlichung: 2022
Medientyp: Patent
Sonstiges:
  • Nachgewiesen in: USPTO Patent Applications
  • Sprachen: English
  • Document Number: 20220301953
  • Publication Date: September 22, 2022
  • Appl. No: 17/462118
  • Application Filed: August 31, 2021
  • Claim: 1. A semiconductor device, comprising: a first resistance chain including first upper resistance segments, first resistance via plugs, and first lower resistance segments; a second resistance chain including second upper resistance segments, second resistance via plugs, and second lower resistance segments; and a third resistance chain including third upper resistance segments, third resistance via plugs, and third lower resistance segments, wherein the first upper resistance segments have a first upper effective resistance distance, and the second upper resistance segments have a second upper effective resistance distance, and the third upper resistance segments have a third upper effective resistance distance, and the first upper effective resistance distance is equal to the third upper effective resistance distance, and the second upper effective resistance distance is an integer multiple of the first upper effective resistance distance.
  • Claim: 2. The semiconductor device of claim 1, wherein the first lower resistance segments have a first lower effective resistance distance, and the second lower resistance segments have a second lower effective resistance distance, and the third lower resistance segments have a third lower effective resistance distance, and the first lower effective resistance distance is equal to the second lower effective resistance distance, and the third lower effective resistance distance is an integer multiple of the first lower effective resistance distance.
  • Claim: 3. The semiconductor device of claim 2, wherein the first resistance via plugs have a first via effective resistance distance, and the second resistance via plugs have a second via effective resistance distance, and the third resistance via plugs have a third via effective resistance distance, and the first via effective resistance distance, the second via effective resistance distance, and the third via effective resistance distance are the same.
  • Claim: 4. The semiconductor device of claim 1, wherein the total number of the first upper resistance segments of the first resistance chain, the total number of the second upper resistance segments of the second resistance chain, and the total number of the third upper resistance segments of the third resistance chain are the same.
  • Claim: 5. The semiconductor device of claim 4, wherein the total number of the first lower resistance segments of the first resistance chain, the total number of the second lower resistance segments of the second resistance chain, and the total number of the third lower resistance segments of the third resistance chain are the same.
  • Claim: 6. The semiconductor device of claim 5, wherein the total number of the first resistance via plugs of the first resistance chain, the total number of the second resistance via plugs of the second resistance chain, and the total number of the third resistance via plugs of the third resistance chain are the same.
  • Claim: 7. The semiconductor device of claim 1, further comprising: a first front pad, and a first front switch electrically connecting the first front pad to the first resistance chain; a second front pad, and a second front switch electrically connecting the second front pad to the second resistance chain; and a third front pad, and a third front switch electrically connecting the third front pad to the third resistance chain.
  • Claim: 8. The semiconductor device of claim 7, further comprising: a first end pad, and a first end switch electrically connecting the first end pad to the first resistance chain; a second end pad, and a second end switch electrically connecting the second end pad to the second resistance chain; and a third end pad, and a third end switch electrically connecting the third end pad to the third resistance chain.
  • Claim: 9. The semiconductor device of claim 8, further comprising: a first end via electrically connecting the first end pad and the first end switch; a first end switch contact electrically connecting the first end switch and the first resistance chain; a second end via electrically connecting the second end pad and the second end switch; a second end switch contact electrically connecting the second end switch and the second resistance chain; a third end via electrically connecting the third end pad and the third end switch; and a third end switch contact electrically connecting the third end switch and the third resistance chain.
  • Claim: 10. The semiconductor device of claim 7, further comprising: a first front via electrically connecting the first front pad and the first front switch; a first front switch contact electrically connecting the first front switch and the first resistance chain; a second front via electrically connecting the second front pad and the second front switch; a second front switch contact electrically connecting the second front switch and the second resistance chain; a third front via electrically connecting the third front pad and the third front switch; and a third front switch contact electrically connecting the third front switch and the third resistance chain.
  • Claim: 11. The semiconductor device of claim 10, wherein each of the first front switch, the second front switch, and the third front switch includes a MOS transistor.
  • Claim: 12. The semiconductor device of claim 1, wherein the first upper resistance segments, the second upper resistance segments, and the third upper resistance segments have the same cross-sectional area and the same material; the first lower resistance segments, the second lower resistance segments, and the third lower resistance segments have the same cross-sectional area and the same material; and the first resistance via plugs, the second resistance via plugs, and the third resistance via plugs have the same cross-sectional area and the same material.
  • Claim: 13. The semiconductor device of claim 1, wherein the first upper resistance segments, the second upper resistance segments, and the third upper resistance segments have a segment shape formed at an upper level and extending horizontally, and the first lower resistance segments, the second lower resistance segments, and the third lower resistance segments have a segment shape formed at a lower level and extending horizontally, and the first resistance via plugs, the second resistance via plugs, and the third resistance via plugs have a pillar shape extending vertically to electrically connect the first to third upper segments and the first to third lower resistance segments, respectively.
  • Claim: 14. A semiconductor device, comprising: a first resistance chain including first upper resistance segments, first resistance via plugs, and first lower resistance segments; a second resistance chain including second upper resistance segments, second resistance via plugs, and second lower resistance segments; and a third resistance chain including third upper resistance segments, third resistance via plugs, and third lower resistance segments, wherein the total number of the first upper resistance segments, the total number of the second upper resistance segments, and the total number of the third upper resistance segments are the same, and the total number of the first lower resistance segments, the total number of the second lower resistance segments, and the total number of the third lower resistance segments are the same, and the total number of the first resistance via plugs, the total number of the second resistance via plugs, and the total number of the third resistance via plugs are the same.
  • Claim: 15. The semiconductor device of claim 14, wherein the first upper resistance segments, the second upper resistance segments, and the third upper resistance segments are formed at the same level, and the first lower resistance segments, the second lower resistance segments, and the third lower resistance segments are formed at the same level, and the first resistance via plugs, the second resistance via plugs, and the third resistance via plugs are formed at the same level.
  • Claim: 16. The semiconductor device of claim 14, wherein the first upper resistance segments each have a first upper effective resistance distance, and the second upper resistance segments each have a second upper effective resistance distance, and the third upper resistance segments each have a third upper effective resistance distance, and the first upper effective resistance distance is equal to the third upper effective resistance distance, and the second upper effective resistance distance is twice the first upper effective resistance distance.
  • Claim: 17. The semiconductor device of claim 14, wherein the first lower resistance segments each have a first lower effective resistance distance, and the second lower resistance segments each have a second lower effective resistance distance, and the third lower resistance segments each have a third lower effective resistance distance, and the first lower effective resistance distance is equal to the second lower effective resistance distance, and the third lower effective resistance distance is twice the first lower effective resistance distance.
  • Claim: 18. The semiconductor device of claim 14, wherein the first resistance via plugs each have a first via effective resistance distance, and the second resistance via plugs each have a second via effective resistance distance, and the third resistance via plugs each have a third via effective resistance distance, and the first via effective resistance distance, the second via effective resistance distance, and the third via effective resistance distance are the same.
  • Claim: 19. A semiconductor device, comprising: a first resistance chain including first upper resistance segments having a first upper effective resistance distance, first resistance via plugs having a first via effective resistance distance, and first lower resistance segments having a first lower effective resistance distance; a second resistance chain including second upper resistance segments having a second upper effective resistance distance, second resistance via plugs having a second via effective resistance distance, and second lower resistance segments having a second lower effective resistance distance; and a third resistance chain including third upper resistance segments having a third upper effective resistance distance, third resistance via plugs having a third via effective resistance distance, and third lower resistance segments having a third lower effective resistance distance, wherein a total length of the second resistance chain is longer than a total length of the first resistance chain by a sum of the first upper effective resistance distances of the first upper resistance segments, and a total length of the third resistance chain is longer than the total length of the first resistance chain by a sum of the first lower effective resistance distances of the first lower resistance segments.
  • Claim: 20. The semiconductor device of claim 19, wherein the sum of the first upper effective resistance distances is equal to the sum of the third upper effective resistance distances; and the sum of the first lower effective resistance distances and the sum of the second lower effective resistance distances are the same.
  • Current International Class: 01; 01

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