Einzeltreffer — DigiBib

A circuit with an electro-static discharge clamp coupled to a first power source and second power source. The electro-static discharge clamp includes an NMOS stack and an electro-static discharge detector. The NMOS stack has a first NMOS transistor with gate node ng1 and a second NMOS transistor with gate node ng2. The electro-static discharge detector is configured to control the NMOS stack, and may include three switches. A first switch is configured to switch the gate node ng1 to the second power source. A second switch is configured to switch the gate node ng1 to the gate node ng2. A third switch is configured to switch the gate node ng1 to the ground.

Titel:	ELECTRO-STATIC DISCHARGE CLAMP (ESD) FOR NxVDD POWER RAIL
Link:	Zum Volltext
Veröffentlichung:	2013
Medientyp:	Patent
Sonstiges:	Nachgewiesen in: USPTO Patent Applications Sprachen: English Document Number: 20130235497 Publication Date: September 12, 2013 Appl. No: 13/415621 Application Filed: March 08, 2012 Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD. (Hsin-Chu, TW) Claim: 1. A circuit with an electro-static discharge clamp coupled to a first power source and second power source, comprising:. an NMOS transistor stack comprising: a first NMOS transistor with gate node ng1 and a drain connected to the second power source; a second NMOS transistor with gate node ng2, the second NMOS transistor being stacked with the first NMOS transistor and a source connected to ground; and an electro-static discharge detector configured to control the NMOS transistor stack. Claim: 2. The circuit of claim 1, wherein the voltage of the second power source is greater than the voltage of the first power source. Claim: 3. The circuit of claim 2, the electro-static discharge detector further comprising: a first switch configured to switch the gate node ng1 to the second power source. Claim: 4. The circuit of claim 3, the electro-static discharge detector further comprising: a second switch configured to switch the gate node ng1 to the gate node ng2. Claim: 5. The circuit of claim 4, the electro-static discharge detector further comprising: a third switch configured to switch the gate node ng2 to the ground. Claim: 6. The circuit of claim 5, wherein during a normal operation, the first switch is open; the second switch is open; and the third switch is short. Claim: 7. The circuit of claim 6, wherein during an electronic discharge event, the first switch is short; the second switch is short; and the third switch is open. Claim: 8. The circuit of claim 7, wherein the electro-static discharge detector further comprises: an electro-static discharge sensor configured to control the second switch and the third switch. Claim: 9. The circuit of claim 8, wherein the electro-static discharge sensor is a resistance-capacitance (RC). Claim: 10. The circuit of claim 9, wherein the second switch is a PMOS transistor. Claim: 11. The circuit of claim 10, wherein the third switch is a third NMOS transistor. Claim: 12. The circuit of claim 11, the wherein the first switch is a capacitor. Claim: 13. The circuit of claim 11, the wherein the first switch is a diode string. Claim: 14. The circuit of claim 10, wherein the electro-static discharge sensor is a latch circuit detector. Claim: 15. The circuit of claim 14, wherein the second switch is a PMOS transistor. Claim: 16. The circuit of claim 15, wherein the third switch is a third NMOS transistor. Claim: 17. The circuit of claim 9, the wherein the capacitor is an NMOS, PMOS MIM (Metal-Insulator-Metal) or MOM (Metal Oxide Metal) capacitor. Claim: 18. The circuit of claim 12, the wherein the capacitor is an NMOS, PMOS MIM (Metal-Insulator-Metal) or MOM (Metal Oxide Metal) capacitor. Claim: 19. A circuit with an electro-static discharge clamp coupled to a first power source and second power source, comprising: an NMOS transistor stack comprising: a first NMOS transistor with gate node ng1 and a drain connected to the second power source; a second NMOS transistor with gate node ng2, the second NMOS transistor being stacked with the first NMOS transistor and a source connected to ground; and an electro-static discharge detector configured to control the NMOS transistor stack; a first switch configured to switch the gate node ng 1 to the second power source; a second switch configured to switch the gate node ng1 to the gate node ng2; a third switch configured to switch the gate node ng2 to the ground; and an electro-static discharge sensor configured to control the second switch and the third switch; wherein the voltage of the second power source is greater than the voltage of the first power source. Claim: 20. A method of operating an electro-static discharge clamp coupled to a first power source and second power source during an electronic discharge event, comprising: shorting a first switch configured to switch a gate node ng1 of a first NMOS transistor to the second power source, the first NMOS transistor having a drain connected to the second power source; shorting a second switch configured to switch the gate node ng1 to the gate node ng2 of a second NMOS transistor, the second NMOS transistor being stacked with the first NMOS transistor and having a source connected to ground; and opening a third switch configured to switch the gate node ng2 to the ground. Current U.S. Class: 361/56 Current International Class: 02

Klicken Sie ein Format an und speichern Sie dann die Daten oder geben Sie eine Empfänger-Adresse ein und lassen Sie sich per Email zusenden.

BibTeX Citavi, JabRef, u.a.
(Literaturverwaltung)

PDF kein Volltext!
(Merkzettel, Notizen)

RIS Endnote, Citavi u.a.
(Literaturverwaltung)

MODS
(XML zur Weiterverarbeitung)

oder

Wählen Sie das für Sie passende Zitationsformat und kopieren Sie es dann in die Zwischenablage, lassen es sich per Mail zusenden oder speichern es als PDF-Datei.

Gewünschter Zitations-Stil:

oder

Bitte prüfen Sie, ob die Zitation formal korrekt ist, bevor Sie sie in einer Arbeit verwenden. Benutzen Sie gegebenenfalls den "Exportieren"-Dialog, wenn Sie ein Literaturverwaltungsprogramm verwenden und die Zitat-Angaben selbst formatieren wollen.

ELECTRO-STATIC DISCHARGE CLAMP (ESD) FOR NxVDD POWER RAIL